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Director of 3D Stacked Logic Design

SK hynix America
Location
San Jose, CA
Posted
16 days ago
Department
Engineering
What they actually want (must-haves)
  • Bachelor’s degree or higher in Electrical Engineering or a related discipline
  • 8+ years of relevant experience in RTL design and implementation memory PHY, hard macro IP for high-speed circuit, or high-speed digital IP design
  • Experience in memory controller
  • Experience in memory Built-in Self Test(BIST), DRAM Design for Test(DFT) / Design for Debug(DFD)
  • Deep understanding of PPA analysis and optimization, and physical design
  • Excellent verbal and written communication in English
What the job really is

The Director of 3D Stacked Logic Design at SK hynix America will lead the design and implementation of high-speed digital IP for 3D-stacked DRAM peripheral circuits. This role involves managing foundry verification processes, establishing IP business infrastructure, and ensuring seamless integration of IP within customer design environments, while collaborating closely with U.S.-based customers to enhance DRAM-on-Logic system configurations.

Benefits
  • Top Tier health insurance at no employee cost
  • Paid Time Off, Company Holidays, Parental Leave, Happy Fridays
  • 401k Matching
  • Flexible Spending Account (FSA) for Health Care & Dependent Care
  • Educational reimbursement up to $10,000 per year
  • Donation Matching and volunteering opportunities
Things to weigh
  • Compensation range is broad and depends on location and experience, specifics will be discussed during hiring process.
  • The role requires extensive experience in a specialized area of digital IP design, which may limit candidates without this background.
Job score3.2/5
Benefits4/5
Freshness4/5
Career value4/5
Role clarity4/5
Pay transparency0/5

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