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← Samsung Semiconductor

Staff Engineer, DRAM

Samsung Semiconductor
Location
San Jose, California, United States
Posted
19 days ago
Department
DRAM Design Lab (DDL)
What they actually want (must-haves)
  • Bachelors with 10+ years of relevant industry experience, or Masters with 8+ years or PhD with 5+ years of experience in DRAM or related technical field
  • Required knowledge, achievements, and skillsets in memory design
  • Proficient with design software and statistical analysis tools
Nice to have
  • Expertise in DRAM product development (DDRx, GDDRx, LPDDRx, HBMx, etc.)
  • Strong experience in DRAM I/O interfaces and SERDES
  • Proficiency in DRAM full chip functional verification
  • Comprehensive understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis
  • Demonstrated track record of innovation and creativity in problem solving
What the job really is

As a Staff Engineer in the DRAM Design Lab at Samsung, you will be responsible for developing and optimizing DRAM architecture for next-generation products, including High Bandwidth Memory (HBM). Your role involves leading design specifications, conducting performance analyses, and collaborating with cross-functional teams to ensure alignment with product strategies. You will also focus on enhancing chip reliability and power consumption through innovative design methodologies.

Benefits
  • Medical/Dental/Vision/401k
  • 4+ weeks of paid time off a year, plus holidays and sick leave
  • Stipend for fertility care or adoption, medical travel support, and virtual vet care
  • On-demand apps and free confidential therapy sessions
  • Onsite Café and gym, plus virtual classes
  • Flexible work environment
Things to weigh
  • Daily onsite presence required in San Jose office
  • No specific mention of the technology stack used
  • High application volume may limit candidate experience
Job score3/5
Benefits3/5
Freshness4/5
Career value4/5
Role clarity4/5
Pay transparency0/5

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