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← Astera Labs

Tech Lead– Verification Methodology/CAD

Astera Labs
Location
Bengaluru, Karnataka, India
Posted
24 days ago
Department
Design Verification CCE2
What they actually want (must-haves)
  • 6–12 years of experience in verification methodology, CAD, and automation
  • Strong programming/scripting skills in Python, Tcl, Perl, Shell, and preferably C/C++
  • Strong understanding of SystemVerilog/UVM
  • Experience with simulation tools such as VCS, Xcelium, Questa, or equivalent
  • Experience building and maintaining regression infrastructure
  • Strong knowledge of coverage collection and analysis
Nice to have
  • Experience with large-scale SoC/IP verification environments
  • Experience integrating multiple EDA tools into a unified verification flow
  • Experience with CI/CD infrastructure such as Jenkins, GitLab CI, or equivalent
  • Experience with distributed/parallel regression infrastructure
  • Experience with cloud-based or scalable compute environments
What the job really is

The Tech Lead – Verification Methodology/CAD/Automation Engineer will be responsible for driving verification infrastructure and methodology across IP and SoC verification teams. Daily tasks include building scalable verification frameworks, automating workflows, improving regression infrastructure, and collaborating with design verification teams to establish efficient methodologies.

Things to weigh
  • No salary listed
  • Role involves mentoring and technical leadership responsibilities
  • Focus on both immediate project needs and long-term methodology improvements
Job score2.8/5
Benefits1/5
Freshness4/5
Career value4/5
Role clarity5/5
Pay transparency0/5

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